--Ejemplo de diseño de una ROM: Se ha dividido en:

-- Modelo de la ROM
-- Tabla de contenidos de la ROM

--TABLA DE CONTENIDOS
library ieee;
use ieee.std_logic_1164.all;
package rom is
-- n, m definen el tamaño de la ROM
constant n: integer:=2; --width= 2**2 -> 4
constant m: integer:=3; --length = 2**3 -> 8

subtype romword is std_logic_vector(2**n-1 downto 0);
type rommxn is array (0 to (2**m-1)) of romword;
constant rom: rommxn:=rommxn'(

"0000",
"0001",
"0011",
"0010",
"0110",
"0111",
"1111",
"1110");

end;

--MODELO ROM
library ieee;
use ieee.std_logic_1164.all;
use work.rom.all;
entity mem is
port

(addr: in integer range 0 to 2**m - 1;
dato: out std_logic_vector(2**n-1 downto 0));

end;
architecture rtl of mem is
begin

dato <= rom(addr);

end;


WcN - Joan Oliver. Diseño de circuitos digitales con VHDL